CMOS Implementation of Programmable Logic Gates and Pipelined Full Adders using Threshold Logic Gates Based on NDR Devices
SubjectCMOS logic circuits , Logic gates , Logic devices , Programmable logic arrays , Programmable logic devices , Adders , Resonant tunneling devices , Logic circuits , Prototypes , CMOS technology
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AbstractThis paper presents a new prototyping technique, which allows efficient verification of circuit concepts based on negative differential resistance (NDR) devices. This prototype, which is called MOS-NDR, has been used to implement programmable logic gates and pipelined-ripple-carry full adders using linear threshold gates (LTGs).
DepartmentElectrical and Computer Engineering
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