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FPGA Implementation for AES Security in Mobile Phones on ARM Process
Alolyan, Hanouf Bamakhsh, Dana Amin, Ruhana Muqaybil, Yara Hassan, Sara M.
Alolyan, Hanouf
Bamakhsh, Dana
Amin, Ruhana
Muqaybil, Yara
Hassan, Sara M.
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Supervisor
Date
2026-02-26
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Abstract
Embedded systems (ES) are key players in today's world of digital and mobile phones. They are the backbone of these systems in terms of their functionality and efficiency. ES are based on various architectures. ARM (Advanced RISC Machine) is one of the popular architectures adopted by many systems and has become the industry standard. Its capabilities include high performance and a compact design. The built principle of ARM is based on the use of Reduced Instruction Set Computing (RISC), which allows for better energy optimization and faster processing and makes it ideal for smartphones, tablets, IoT devices, and wearable devices. This study introduces the FPGA implementation of the Advanced Encryption System (AES) technique with an ARM processor. The Xilinx Spartan 3A/3AN FPGA starting kit (XC3S700A) was used in the implementation. The suggested system was implemented by writing VHDL codes using the Xilinx package ISE 14.7. The simulations are performed via the ISE. The proposed system introduces an adequate number of resources for device utilization. With high standard security by using 128 bits AES
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